Conceptual Design Edit
Use a capture-and-hold circuit to only update the input to the 555 timer circuit when an 'enable' input is high.
Functional Description Edit
Input and output are buffered with opamp voltage followers. Large capacitor is used to hold voltage. Transistor is used as switch to close the circuit between input to holding capacitor when the enable is high.
Block Diagram Edit
voltage follower -> transistor, collector=input, base=enable + current-limiting resistor, emitter=holding cap -> holding cap -> voltage follower
Design Parameters Edit
hold voltage for up to a second, acquire voltage in 50ms
Design Implementation Edit
47uF cap, 22K current limiting resistor for enable input.
Performance Testing Edit
Quick and dirty. Hold time is fine, acquire time I hope will be fine.Transistor limits the range of the output voltage. Digital enable needs to be at Vcc.